1. Field
Example embodiments relate to a method and an apparatus for reading data stored in a memory. For example, example embodiments may relate to a method and an apparatus for controlling a reference voltage based on whether an error occurs in the stored data.
2. Description of Related Art
A single-level cell (SLC) memory device may store one data bit in a single memory cell. The SLC memory may be referred to as a single-bit cell (SBC) memory. The SLC memory may store and read one data bit at a voltage level included in two distributions that are divided by a threshold voltage level programmed in a memory cell. The programmed threshold voltage may have a distribution within a certain range due to a fine electric characteristic difference between the SLC memories. For example, when a voltage level read from the memory cell is greater than 0.5V and less than 1.5V, it may be determined that the data stored in the memory cell has a logic value of “1.” When the voltage level read from the memory cell is greater than 2.5V and less than 3.5V, it may be determined that the data stored in the memory cell has a logic value of “0.” The data stored in the memory cell may be classified depending on the difference between cell currents and/or cell voltages during the reading operations.
Meanwhile, a multi-level cell (MLC) memory device that may store two or more data bits in a single memory cell has been proposed in response to a need for higher integration of memory. The MLC memory device may also be referred to as a multi-bit cell (MBC) memory. However, as the number of bits stored in the single memory cell increases, reliability may deteriorate and read-failure rates may increase. To store “m” bits in a single memory cell, 2m voltage level distributions may be required. However, since the voltage window for a memory device is limited, the difference in threshold voltage between adjacent bits may decrease as “m” increases, causing the read-failure rate to increase.
Accordingly, conventional art may not be able to improve storage density using a MLC memory due to the above-mentioned reasons.